Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling
نویسندگان
چکیده
This research paper explains the effect of dimensions Gate-all-around Si nanowire tunneling field transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage (VT). These parameters are critical factors characteristics tunnel transistors. The Silvaco TCAD has been used to study electrical TFET. Output (gate voltage-drain current) with channel were simulated. Results show that 50nm long nanowires 9nm-18nm diameter 3nm oxide thickness tend have best (Si-NW characteristics.
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ژورنال
عنوان ژورنال: International Journal of Power Electronics and Drive Systems
سال: 2021
ISSN: ['2722-2578', '2722-256X']
DOI: https://doi.org/10.11591/ijece.v11i1.pp780-787